Virtual Memory Management — Solved Numericals

CSS Optional — Paper-II, Section-A · P-II.III.VI (numericals) · Worked past-paper problems for [Virtual Memory Management]. Read the concepts page first (page replacement algorithms, TLB, multi-level page tables) — this page is pure practice.

Numerical 1 — Effective Memory Access Time (EMAT) with TLB (CSS 2021, 3 marks)

Given: TLB hit ratio = 85%, TLB access time = 20 ns, Memory access time = 115 ns.

EMAT = HitRate×(TLB + Mem) + (1−HitRate)×(TLB + PageTable + Mem)
     = 0.85×(20+115) + 0.15×(20+115+115)
     = 0.85×135 + 0.15×250
     = 114.75 + 37.5
     = 152.25 ns

Answer: 152.25 nanoseconds. (On a miss, the page table itself must be fetched from memory — an extra 115 ns — before the actual data access.)

Numerical 2 — LRU Page Fault Count (CSS 2025 MCQ)

Reference string (3 frames): 7 0 1 2 0 3 0 4 2 3 0 3 2 1 2 0 1 7 0 1

Step-by-step (frame set shown after each reference; * marks a fault):
7*  → {7}
0*  → {7,0}
1*  → {7,0,1}
2*  → evict 7 (LRU) → {0,1,2}
0   → hit, 0 now most-recent
3*  → evict 1 (LRU) → {2,0,3}
0   → hit
4*  → evict 2 (LRU) → {0,3,4}
2*  → evict 3 (LRU) → {0,4,2}
3*  → evict 0 (LRU) → {4,2,3}
0*  → evict 4 (LRU) → {2,3,0}
3   → hit
2   → hit
1*  → evict 0 (LRU) → {3,2,1}
2   → hit
0*  → evict 3 (LRU) → {2,1,0}
1   → hit
7*  → evict 2 (LRU) → {1,0,7}
0   → hit
1   → hit

Counting the * faults: 12 page faults total — matching the CSS 2025 answer key (option D). The key skill examiners test: correctly updating the recency order on every hit too, not just on faults (a hit moves that page to "most recently used," which changes the next eviction choice).

Numerical 3 — Multi-Level Page Table (CSS 2025, 10 marks)

Given: virtual address = 10-bit Outer VPN + 10-bit Inner VPN + 12-bit offset; physical address = 20-bit PPN + 12-bit offset; PTE = 32 bits.

(i)   Page size = 2^12 = 4096 bytes = 4 KB
(ii)  Virtual address width = 10+10+12 = 32 bits → max VAS = 2^32 bytes = 4 GB
(iii) Physical address width = 20+12 = 32 bits → max physical memory = 2^32 bytes = 4 GB
(iv)  Two-level lookup (no TLB):
      Step 1: top 10 bits index the Outer Page Table (1024 entries) → base of the correct Inner Page Table
      Step 2: next 10 bits index that Inner Page Table (1024 entries) → 32-bit PTE → extract 20-bit PPN
      Step 3: append the untranslated 12-bit offset to the PPN → final 32-bit physical address
      (2 sequential memory accesses to page tables before the real data access — the overhead a TLB exists to hide)

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🎯 CSS Exam Angle

Whenever a question gives a reference string + frame count, examiners are testing whether you can maintain state correctly across both faults and hits — the #1 marks-losing mistake is forgetting to update recency/usage bookkeeping on a hit. For TLB/EMAT formulas, always state the formula explicitly before substituting numbers (partial marks are awarded for a correct formula even with an arithmetic slip).

⚠️ MCQ Traps

• Recount the reference string carefully on hits — skipping the recency update on a hit is the single most common source of a wrong final fault count.
• For multi-level page tables, remember the offset bits are never translated — they pass straight through from virtual to physical address unchanged.