I.4 Computer System Components and Communication System

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Exam pattern (2016–2026): No direct question. The ports MCQ (2024 Q1, USB) is answered on I.11 Types of Hardware.

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1. The Four Functional Components

• Cycle: input → process → store → output, in every computer of any size.

1.1 Input Unit

• Takes data and instructions from outside (keyboard, mouse, scanner, microphone).
• Converts them into binary for the CPU.
• The only gateway for outside data.
• Details: I.7 Input Devices.

1.2 Central Processing Unit (CPU)

• The "brain"; runs the fetch → decode → execute cycle.
• Control Unit (CU): coordinates and sends control signals.
• Arithmetic Logic Unit (ALU): does arithmetic and logic.
• Performance depends on: clock speed (e.g. 3.5 GHz) and number of cores.
• Details: I.5 Components of a Computer System.

1.3 Memory Unit

• RAM: fast, temporary working memory (volatile).
• ROM: permanent boot instructions.
• Cache (L1/L2/L3): tiny, very fast buffer next to the CPU.
• Saves the CPU from waiting on slow secondary storage.

1.4 Output Unit

• Turns results into usable form: screen, print, sound, or a signal to another device.
• Examples: monitor, printer, speaker.
• Details: I.8 Output Devices.

1.5 Exam refinements

• CU + ALU + registers = CPU.
• CPU + memory = central processing system.
• Secondary storage (HDD/SSD) is often listed as a fifth component, for permanent storage.

2. The Communication System (Buses)

• Bus: a set of parallel wires carrying signals between CPU, memory and I/O.
• The three buses together form the system bus.

2.1 Data bus

• Carries: the actual data and instructions.
• Direction: bidirectional.
• Width: bits moved per transfer (8, 16, 32, 64).
  • A 64-bit bus moves 8 bytes per cycle; a 32-bit bus moves 4.

2.2 Address bus

• Carries: only the memory address (where to read or write).
• Direction: unidirectional, CPU → memory/I-O.
• Width: sets maximum memory: an n-bit bus addresses $2^n$ locations.

2.3 Control bus

• Carries: control and timing signals.
  • read/write commands
  • clock pulses
  • interrupt requests (IRQ)
  • bus request/grant, reset
• Direction: bidirectional overall (CPU sends commands; devices send interrupts back).
• Job: tells the other buses when and how to act.

2.4 Comparison

• 🧠 Formula: address says where, data carries what, control decides when and which way.

2.5 Worked numerical — 32-bit address bus

• Number of locations:
  • $2^{32} = 4{,}294{,}967{,}296$
• At 1 byte per location:
  • $4{,}294{,}967{,}296 \text{ bytes} = 4 \text{ GiB}$
• So: 32-bit Windows cannot use more than about 4 GB RAM.
• 64-bit: $2^{64}$ locations = 16 EiB in theory.

3. Why Buses Matter

• Without buses, CPU, memory and devices are isolated parts.
• The bus system turns them into one working computer.

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4. ⚠️ MCQ Traps

• Address bus = unidirectional; data bus = bidirectional. Often reversed in options.
• Control bus carries signals, not data or addresses.
• n-bit address bus → $2^n$ locations, not $n^2$.

5. ✅ Self-Test Questions (with Answers)

Q1. Name the four functional components in operational order.

• Input Unit → CPU → Memory Unit → Output Unit.
• One line on each from section 1.
• Add: CU + ALU + registers = CPU; secondary storage as fifth component.

Q2. What are the three buses and what does each carry?

• Data bus: data and instructions; bidirectional.
• Address bus: addresses; unidirectional.
• Control bus: read/write, clock, interrupts; bidirectional overall.
• Draw the table in 2.4 and show the $2^{32}$ = 4 GiB working.

Q3. Why is the address bus unidirectional but the data bus bidirectional?

• Address bus: only the CPU (or a DMA controller) creates addresses; memory and devices only respond.
• Data bus: data must flow both ways:
  • Read: memory/device → CPU (fetch instruction, load value).
  • Write: CPU → memory/device (store result, send to printer).
• Direction control: the control bus sets direction each cycle using memory-read (MEMR) or memory-write (MEMW) signals.